academic article

• Energy efficient optimal deployment of industrial wireless mesh networks using transient trigonometric Harris Hawks optimizer.  Heliyon.  10:e28719. 2024
• Carbon nanotube field effect transistors: an overview of device structure, modeling, fabrication and applications.  Physica Scripta.  98:082003. 2023
• Hybrid Harris Hawks With Sine Cosine for Optimal Node Placement and Congestion Reduction in an Industrial Wireless Mesh Network.  IEEE Access.  11:2500-2523. 2023
• IoT Edge Device Security: An Efficient Lightweight Authenticated Encryption Scheme Based on LED and PHOTON.  Applied Sciences.  13:10345. 2023
• Resistive random access memory: introduction to device mechanism, materials and application to neuromorphic computing.  Discover Nano.  18:36. 2023
• An Arithmetic-Trigonometric Optimization Algorithm with Application for Control of Real-Time Pressure Process Plant.  Sensors.  22:617. 2022
• Optimal Coverage and Connectivity in Industrial Wireless Mesh Networks Based on Harris’ Hawk Optimization Algorithm.  IEEE Access.  10:51048-51061. 2022
• Reliable Fault Tolerant-Based Multipath Routing Model for Industrial Wireless Control Systems.  Applied Sciences.  12:544. 2022
• 2-D Design of Double Gate Schottky Tunnel MOSFET for High-Performance Use in Analog/RF Applications.  IEEE Access.  9:80158-80169. 2021
• A Survey on the Application of WirelessHART for Industrial Process Monitoring and Control.  Sensors.  21:4951. 2021
• Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits.  Electronics.  10:79. 2021
• Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits.  Electronics.  10:79. 2021
• Carbon nanotube field effect transistor (CNTFET) operational transconductance amplifier (OTA) based design of high frequency memristor emulator.  International Journal of Numerical Modelling: Electronic Networks, Devices and Fields.  34. 2021
• Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM).  Micromachines.  12:1288. 2021
• Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM).  Micromachines.  12:1288. 2021
• FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices.  IEEE Access.  8:207610-207618. 2020
• Fractional-Order Predictive PI Controller for Dead-Time Processes With Set-Point and Noise Filtering.  IEEE Access.  8:183759-183773. 2020
• Fractional-Order Predictive PI Controller for Dead-Time Processes With Set-Point and Noise Filtering.  IEEE Access.  8:183759-183773. 2020
• Single event burnout hardening of trench shielded power UMOSFET using High-κ dielectrics.  Materials Research Express.  7:035907. 2020
• Bleeding detection in wireless capsule endoscopy videos — Color versus texture features.  Journal of Applied Clinical Medical Physics.  20:141-154. 2019
• Bleeding detection in wireless capsule endoscopy videos — Color versus texture features.  Journal of Applied Clinical Medical Physics.  20:141-154. 2019
• Bio‐inspired network on chip having both guaranteed throughput and best effort services using fault‐tolerant algorithm.  IEEJ Transactions on Electrical and Electronic Engineering.  13:1153-1162. 2018
• Fine-Grained Overhead Characterisation of Cross-ISA DBTO for Multicore Processor.  Indonesian Journal of Electrical Engineering and Computer Science.  10:1036. 2018
• A Hybrid Delay Design-for-Testability for Nonseparable RTL Controller-Data Path Circuits.  Journal of Circuits, Systems and Computers.  26:1750021. 2017
• Advances in Testing Techniques for Digital Microfluidic Biochips.  Sensors.  17:1719. 2017
• Bio-inspired fault tolerant network on chip.  Integration.  58:155-166. 2017
• Feature Selection and Classification of Ulcerated Lesions Using Statistical Analysis for WCE Images.  Applied Sciences.  7:1097. 2017
• Localization of optic disc and fovea in retinal images using intensity based line scanning analysis.  Computers in Biology and Medicine.  87:382-396. 2017
• Minimizing scheduling overhead in LRE-TL real-time multiprocessor scheduling algorithm.  TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES.  25:263-277. 2017
• Offline Error Detection in MEDA-Based Digital Microfluidic Biochips Using Oscillation-Based Testing Methodology.  Journal of Electronic Testing.  33:621-635. 2017
• Offline Error Detection in MEDA-Based Digital Microfluidic Biochips Using Oscillation-Based Testing Methodology.  Journal of Electronic Testing.  33:621-635. 2017
• Review of Network on Chip Architectures.  Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering).  10. 2017
• NoC architecture: A closer look.  Asian Journal of Information Technology Journal.  15:2531-2541. 2016
• Bio-inspired NoC fault tolerant techniques using guaranteed throughput and best effort services.  Integration.  54:65-96. 2016
• An Energy Efficient Cross-Layer Network Operation Model for IEEE 802.15.4-Based Mobile Wireless Sensor Networks.  IEEE Sensors Journal.  15:684-692. 2015
• Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs.  IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  23:580-583. 2015
• Multivoltage Aware Resistive Open Fault Model.  IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  22:220-231. 2014
• On Location Estimation Methods for Mobile Wireless Sensor Nodes.  Research Journal of Applied Sciences, Engineering and Technology.  8:124-130. 2014
• A Novel Algorithm for Automated Model Generation of Analog Circuits Using Chebyshev-Newton Interpolation.  Advanced Science Letters.  19:1520-1524. 2013
• A wide-range programmable frequency synthesizer based on a finite state machine filter.  International Journal of Electronics.  100:1546-1556. 2013
• A wide-range programmable frequency synthesizer based on a finite state machine filter.  International Journal of Electronics.  100:1546-1556. 2013
• Fault Modeling of Analog Circuits Using System Identification Automated Model Generation Approaches from SPICE Level Descriptions.  Advanced Science Letters.  19:1276-1280. 2013
• Survey and Evaluation of Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling.  Journal of Electronic Testing.  29:861-877. 2013
• NoC-Compatible Wrapper Design and Optimization under Channel-Bandwidth and Test-Time Constraints.  IEICE Transactions on Information and Systems.  E91-D:2008-2017. 2008
• NoC-Compatible Wrapper Design and Optimization under Channel-Bandwidth and Test-Time Constraints.  IEICE Transactions on Information and Systems.  E91-D:2008-2017. 2008
• On NoC Bandwidth Sharing for the Optimization of Area Cost and Test Application Time.  IEICE Transactions on Information and Systems.  E91-D:1999-2007. 2008
• Scheduling Power-Constrained Tests through the SoC Functional Bus.  IEICE Transactions on Information and Systems.  E91-D:736-746. 2008

article

chapter

• Energy-Efficient Superframe Scheduling in Industrial Wireless Networked Control System.  Lecture Notes in Electrical Engineering. 1227-1242. 2021
• Simulation and Control of Industrial Composition Process Over Wired and Wireless Networks.  Lecture Notes on Data Engineering and Communications Technologies. 685-695. 2021
• Optimum Colour Space Selection for Ulcerated Regions Using Statistical Analysis and Classification of Ulcerated Frames from WCE Video Footage.  Neural Information Processing. 373-381. 2015
• A Modified LRE-TL Real-Time Multiprocessor Scheduling Algorithm.  Lecture Notes in Electrical Engineering. 335-344. 2014
• Acceleration of Retinex Algorithm for Image Processing on Android Device Using Renderscript.  The 8th International Conference on Robotic, Vision, Signal Processing & Power Applications. 137-143. 2014
• Image Enhancement Using Geometric Mean Filter and Gamma Correction for WCE Images.  Neural Information Processing. 276-283. 2014
• Investigation of Collaborative Interaction Using ITB-Based Setting vs. Computer-Based Setting.  Informatics Engineering and Information Science. 354-368. 2011

conference paper

• An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection 2022
• Composite Lightweight Authenticated Encryption Based on LED Block Cipher and PHOTON Hash Function for IoT Devices 2022
• Improved Whale Optimization Algorithm for Optimal Network Coverage in Industrial Wireless Sensor Networks 2022
• Optimal Node Placement and Congestion Reduction in an Industrial Wireless Mesh Network using HHO Algorithm 2022
• Performance Evaluation of an Asynchronous MAC Protocol in Wireless Sensor Network 2022
• Carbon Nanotube Field Effect Transistor and Resistive Random Access Memory based 2-bit Ternary Comparator 2021
• Design and Implementation of Signal Filtering Techniques on Real-time Pressure Process Plant 2021
• Design of Fractional-Order Predictive PI Controller for Real-time Pressure Process Plant 2021
• Design of Fractional-Order Predictive PI Controller for Real-time Pressure Process Plant 2021
• Performance Analysis of CNTFET-ReRAM based Crossbar Network for In-Memory Computing 2021
• Reconstruction of Chaotic Attractor for Fractional-order Tamaševičius System Using Recurrent Neural Networks 2021
• ATS 2020 Preface 2020
• Fractional-order Predictive PI Controller for Process Plants with Deadtime 2020
• Simulation Study of Single Event Burnout Hardening Technique on Power UMOSFET Using P-island Layer 2020
• Simulation and Control of Inverted Pendulum System Dynamics over Control Area Network using TrueTime 2020
• An Efficient Implementation of LED Block Cipher on FPGA 2019
• An Efficient Implementation of LED Block Cipher on FPGA 2019
• Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening 2019
• Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening 2019
• IoT Based Vehicle Emission Monitoring and Alerting System 2019
• Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level 2019
• Net Classification Based on Testability and Netlist Structural Features for Hardware Trojan Detection 2019
• Fine-Grained Overhead Analysis Utilizing Atomic Instructions for Cross-ISA Dynamic Binary Translation on Multicore Processor 2018
• Fine-Grained Overhead Analysis Utilizing Atomic Instructions for Cross-ISA Dynamic Binary Translation on Multicore Processor 2018
• Detection and Classification of Bleeding Region in WCE Images using Color Feature 2017
• Detection and Classification of Bleeding Region in WCE Images using Color Feature 2017
• Automatic detection and removal of bubble frames from wireless capsule endoscopy video sequences 2016
• Automatic detection and removal of bubble frames from wireless capsule endoscopy video sequences 2016
• Biologically inspired network on chip fault tolerant algorithm using time division multiplexing 2016
• Detection and classification of bleeding using statistical color features for wireless capsule endoscopy images 2016
• Dual-Engine Cross-ISA DBTO Technique Utilising MultiThreaded Support for Multicore Processor System 2016
• False path identification algorithm framework for nonseparable controller-data path circuits 2016
• Fault Modeling and Simulation of MEDA Based Digital Microfluidics Biochips 2016
• Investigation of capacitance dependence on droplet volume in MEDA based biochips 2016
• Delay design-for-testability for functional RTL circuits 2015
• On enhancing the reliability of digital microfluidic biochips (DMFB) through electrode cells health classification 2015
• On enhancing the reliability of digital microfluidic biochips (DMFB) through electrode cells health classification 2015
• A semi greedy soft real-time multiprocessor scheduling algorithm 2014
• Automated train track misalignment detection system based on inertia measurement unit 2014
• Automatic generation of test instructions for path delay faults based-on stuck-at fault in processor cores using assignment decision diagram 2014
• Bio-inspired NoC fault tolerant techniques 2014
• Diagonal testing in digital microfluidics biochips using MEDA based approach 2014
• Diagonal testing in digital microfluidics biochips using MEDA based approach 2014
• Enhancement in IEEE 1500 standard for at-speed functional testing 2014
• Enhancement in IEEE 1500 standard for at-speed test and debug 2014
• Optimized encoder architecture for structured low density parity check codes of short length 2014
• Randomness of the PRINCE block cipher 2014
• Automated Model Generation of Analog Circuits through Modified Trajectory Piecewise Linear Approach with Cheby Shev Newton Interpolating Polynomials 2013
• Automatic generation of test instructions for structural faults in processor cores using satisfiability 2013
• Automatic generation of test instructions for structural faults in processor cores using satisfiability 2013
• High throughput architecture for low density parity check (LDPC) encoder 2013
• Implementation of biological sprouting algorithm for NoC fault tolerance 2013
• On testing of MEDA based digital microfluidics biochips 2013
• On using IEEE 1500 standard for functional testing 2013
• Optimization of blood vessel detection in retina images using multithreading and native code for portable devices 2013
• SEOS: Hardware Implementation of Real-Time Operating System for Adaptability 2013
• Synaptogenesis based bio-inspired NoC fault tolerant interconnects 2013
• Synaptogenesis based bio-inspired NoC fault tolerant interconnects 2013
• A link-quality and energy aware routing metric for mobile wireless sensor networks 2012
• A review of TiO[sub 2] nanotube arrays for hydrogen sensing application.  INTERNATIONAL SYMPOSIUM ON GREEN AND SUSTAINABLE TECHNOLOGY (ISGST2019). 2012
• A review of TiO[sub 2] nanotube arrays for hydrogen sensing application.  INTERNATIONAL SYMPOSIUM ON GREEN AND SUSTAINABLE TECHNOLOGY (ISGST2019). 2012
• A review of the current status of the Java programming on embedded real-time systems 2012
• An energy efficient localization estimation approach for mobile wireless sensor networks 2012
• An energy efficient localization estimation approach for mobile wireless sensor networks 2012
• An optimal design of moving objects tracking algorithm on FPGA 2012
• An optimal design of moving objects tracking algorithm on FPGA 2012
• Design and FPGA implementation of PLL-based quarter-rate clock and data recovery circuit 2012
• Design for cold test elimination - facing the Inverse Temperature Dependence (ITD) challenge 2012
• FPGA-based hardware implementation of optical flow constraint equation of Horn and Schunck 2012
• High level fault modeling and fault propagation in analog circuits using NLARX automated model generation technique 2012
• Modular body sensor system design for plug-and-play monitoring system 2012
• Multi-voltage aware resistive open fault modeling 2012
• Performance evaluation of nonlinear automated model generation approaches for high level fault modeling 2012
• Performance evaluation of nonlinear automated model generation approaches for high level fault modeling 2012
• Pipelined architecture for low density parity check encoder 2012
• Resistance dependent delay behaviour of resistive open faults in multi voltage designs 2012
• A case study of process-variation effect to SoC analog circuits 2011
• A critical survey on automated model generation techniques for high level modeling and high level fault modeling 2011
• A gradient coprocessor of optical flow: A hardware co-simulation using FPGA based on MAC-DA 2011
• Detectability analysis for resistive open faults with dynamic supply voltage scaling awareness 2011
• Development of TiO<inf>2</inf> nanotubes for hydrogen sensing application 2011
• Hardware architecture of OFCE-HS for hardware implementation.  SPIE Proceedings. 2011
• High rate (3, k) regular LDPC encoder architecture 2011
• IDVP (Intra-Die Variation Probe) for System-On-Chip (SoC) Infant Mortality screen 2011
• Integration of Scalar Control in Space Vector Pulse-Width Modulation for robust motion controller 2011
• NBTI-induced 8-Bit DAC circuit mismatch in System-On-Chip (SoC) 2011
• Propagation of delay faults caused by resistive open faults with dynamic voltage scaling awareness 2011
• Propagation of delay faults caused by resistive open faults with dynamic voltage scaling awareness 2011
• Road sign detection and recognition system for real-time embedded applications 2011
• A case study for reliability-aware in SoC analog circuit design 2010
• Camera Sensor network localization using FPGA 2010
• Design of interactive board system for collaborative learning 2010
• Design of interactive board system for collaborative learning 2010
• Hardware implementation of an optimized processor architecture for SOBEL image edge detection operator 2010
• Hardware implementation of an optimized processor architecture for SOBEL image edge detection operator 2010
• Investigating collaborative interaction using interactive table and IR devices 2010
• Optimization of Processor Architecture for Image Edge Detection Filter 2010
• Optimization of Processor Architecture for Image Edge Detection Filter 2010
• RedSOCs-3D: Thermal-safe test scheduling for 3D-stacked SOC 2010
• RedSOCs-3D: Thermal-safe test scheduling for 3D-stacked SOC 2010
• Shape-based road sign detection and recognition for embedded application using MATLAB 2010
• Space Vector PWM for PMSM simulation using Matlab Simulink 2010
• Space Vector PWM for PMSM simulation using Matlab Simulink 2010
• Serpent encryption algorithm implementation on Compute Unified Device Architecture (CUDA) 2009
• Area Overhead and Test Time Co-Optimization through NoC Bandwidth Sharing.  16th Asian Test Symposium (ATS 2007). 2007
• Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses 2007
• Optimization of NoC Wrapper Design under Bandwidth and Test Time Constraints.  12th IEEE European Test Symposium (ETS'07). 2007
• Power-Constrained SOC Test Schedules through Utilization of Functional Buses.  2006 International Conference on Computer Design. 2006