Direct synthesis controller design approach has serious limitations when it is applied to plant models that have more complex models and models involving time delays. In such cases the design becomes more cumbersome and the time delay appears in the denominator making it difficult to realize. In order to get simple realizable controllers approximations of plant model and time delays are done. This leads to controllers with non-optimal parameters. In this paper, a new approach for designing the controller by combining direct synthesis approach and system identification is presented. The controller is identified from the plant model and the desired closed-loop without the need for approximating the plant model and the time delay and ensures that the controller parameters are optimal. © (2013) Trans Tech Publications, Switzerland.