eprintid: 960
rev_number: 2
eprint_status: archive
userid: 1
dir: disk0/00/00/09/60
datestamp: 2023-11-09 15:49:07
lastmod: 2023-11-09 15:49:07
status_changed: 2023-11-09 15:38:46
type: conference_item
metadata_visibility: show
creators_name: Latif, M.A.A.
creators_name: Ali, N.B.Z.
creators_name: Hussin, F.A.
title: A case study for reliability-aware in SoC analog circuit design
ispublished: pub
keywords: Aging; Analog; Circuit reliability; Negative bias temperature instability (NBTI); Systems-on-a-chip (SoC), CMOS integrated circuits; Design; Electric network analysis; Field effect transistors; Integrated circuit manufacture; Negative temperature coefficient; Printed circuit design; Programmable logic controllers; Reliability analysis; Thermodynamic stability, Analog circuits
note: cited By 1; Conference of 2010 International Conference on Intelligent and Advanced Systems, ICIAS 2010 ; Conference Date: 15 June 2010 Through 17 June 2010; Conference Code:84196
abstract: This paper provides a working knowledge of Negative Bias Temperature Instability (NBTI) awareness to the circuit design community for reliable design of the System-Ona-Chip (SoC) analog circuit. The reliability performance of all matched pair circuits, such as Bandgap Reference, is at the mercy of aging differential. Aging simulation (AgingSim) is mandatory to obtain realistic risk evaluation for circuit design reliability qualification. It is applicable to all circuit aging problems covering both analog and digital. Failure rate varies as a function of voltage and temperature. It is shown that PMOS is the reliability-critical device and NBTI is the most critical failure mechanism for analog circuit performance in sub-micrometer CMOS technology. We provide a complete reliability simulation analysis of Thermal Sensor DAC and analyze the effect of NBTI using aging simulation tool.
date: 2010
official_url: https://www.scopus.com/inward/record.uri?eid=2-s2.0-79952743599&doi=10.1109%2fICIAS.2010.5716255&partnerID=40&md5=f559f8a5e9152d01f23988b3ead5bcb3
id_number: 10.1109/ICIAS.2010.5716255
full_text_status: none
publication: 2010 International Conference on Intelligent and Advanced Systems, ICIAS 2010
place_of_pub: Kuala Lumpur
refereed: TRUE
isbn: 9781424466238
citation:   Latif, M.A.A. and Ali, N.B.Z. and Hussin, F.A.  (2010) A case study for reliability-aware in SoC analog circuit design.  In: UNSPECIFIED.