TY  - CONF
N1  - cited By 0; Conference of 4th Electronic and Green Materials International Conference 2018, EGM 2018 ; Conference Date: 27 July 2018 Through 28 July 2018; Conference Code:143031
N2  - Advancement of the complexity digital design has inadvertently forces the pre-silicon verification to become an exceedingly important to find the bugs at infancy in an application of integrated chip design cycle. The complexity of the designs poses significance of the RTL validation to allow the bottleneck to be seen at the infancy in the design cycle and produces quality IC. As AMBA is one of the leading busing system used in high performance of SoC design that has been developed to become a family with different bus protocol such as ASB, APB, AHB, AXI and et al. Thus, this study shows the RTL validation platform of the fives digital IPs whose integrated together on the AMBA bus based on the APB and AHB protocol. The verification strategies of the module level is proposed in this paper and presents the strategies at the system level. Therefore, the result shows the percentage on the functionality of RTC covered by proposed techniques. © 2018 Author(s).
ID  - scholars9494
TI  - RTL platform validation of digital intellectual property (IP) of real time clock (RTC) for customized wireless microcontroller unit
AV  - none
A1  - Muhammad, N.Z.
A1  - Harun, A.
A1  - Murad, S.A.Z.
A1  - Jambek, A.B.
A1  - Isa, M.N.M.
A1  - Mohyar, S.N.
A1  - Ismail, R.C.
A1  - Hawari, H.F.
UR  - https://www.scopus.com/inward/record.uri?eid=2-s2.0-85058678778&doi=10.1063%2f1.5080905&partnerID=40&md5=2834b8682bef4770501f5d7bd21bfc8e
VL  - 2045
Y1  - 2018///
PB  - American Institute of Physics Inc.
SN  - 0094243X
ER  -