%0 Conference Paper
%A Harsoori, M.M.
%A Zulkifli, T.Z.A.
%A Abbas, U.
%A Sattar, S.
%D 2017
%F scholars:8541
%I IEEE Computer Society
%K Analog circuits; Cascode amplifiers; CMOS integrated circuits; IEEE Standards; Impedance matching (electric); Integrated circuit design; Millimeter waves; Noise figure, 60 GHz; Cascode; CMOS; Gain boosting; Impedance matchings; Low noise amplifier; Low noiseamplifier; Lumped components; Millimeter-wave; Single stage, Low noise amplifiers
%P 109-112
%R 10.1109/PRIMEASIA.2017.8280376
%T A gain boosting single stage cascode LNA for millimeter-wave applications
%U https://khub.utp.edu.my/scholars/8541/
%V 2017-O
%X This paper presents the design of 60 GHz low noise amplifier (LNA) aimed at realizing IEEE 802.11ad standard using 0.13-μm RF CMOS technology. Single stage cascode with source degeneration topology employing a gain boosting technique is adopted for better isolation and gain performance in millimeter-wave (mmW) frequency band. The simulation of the LNA yields the input reflection coefficient (S11) of -20.75 dB, forward transmission gain (S21) of 7.75 dB, and reverse isolation (£12) of 8.64 dB. The LNA design achieves a noise figure (NF) of 8.9 dB with minimum noise figure (NFmin) of 7.8 dB at 60 GHz. Thus, the design generates power dissipation of 15.17 mW for 1.2 V supply voltage. © 2017 IEEE.
%Z cited By 3; Conference of 2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2017 ; Conference Date: 31 October 2017 Through 2 November 2017; Conference Code:134541