@inproceedings{scholars8541, year = {2017}, journal = {Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics}, publisher = {IEEE Computer Society}, pages = {109--112}, note = {cited By 3; Conference of 2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2017 ; Conference Date: 31 October 2017 Through 2 November 2017; Conference Code:134541}, volume = {2017-O}, doi = {10.1109/PRIMEASIA.2017.8280376}, title = {A gain boosting single stage cascode LNA for millimeter-wave applications}, isbn = {9781538605240}, author = {Harsoori, M. M. and Zulkifli, T. Z. A. and Abbas, U. and Sattar, S.}, issn = {21592144}, abstract = {This paper presents the design of 60 GHz low noise amplifier (LNA) aimed at realizing IEEE 802.11ad standard using 0.13-{\^I}1/4m RF CMOS technology. Single stage cascode with source degeneration topology employing a gain boosting technique is adopted for better isolation and gain performance in millimeter-wave (mmW) frequency band. The simulation of the LNA yields the input reflection coefficient (S11) of -20.75 dB, forward transmission gain (S21) of 7.75 dB, and reverse isolation ({\^A}{\pounds}12) of 8.64 dB. The LNA design achieves a noise figure (NF) of 8.9 dB with minimum noise figure (NFmin) of 7.8 dB at 60 GHz. Thus, the design generates power dissipation of 15.17 mW for 1.2 V supply voltage. {\^A}{\copyright} 2017 IEEE.}, url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-85046335550&doi=10.1109\%2fPRIMEASIA.2017.8280376&partnerID=40&md5=5a337d343334d0e5255999efcde22595}, keywords = {Analog circuits; Cascode amplifiers; CMOS integrated circuits; IEEE Standards; Impedance matching (electric); Integrated circuit design; Millimeter waves; Noise figure, 60 GHz; Cascode; CMOS; Gain boosting; Impedance matchings; Low noise amplifier; Low noiseamplifier; Lumped components; Millimeter-wave; Single stage, Low noise amplifiers} }