<> "The repository administrator has not yet configured an RDF license."^^ . <> . . . "Parallel form of the pipelined intermediate architecture for two-dimensional discrete wavelet transform"^^ . "A lifting-based VLSI architecture for two-dimensional discrete wavelet transform (2-D DWT) for 5/3 and 9/7 algorithms, called, pipelined intermediate architecture was proposed by Ibrahim et al., which aim at reducing power consumption of the overlapped external memory access without using the expensive line-buffer. In this paper, we explore parallelism in order to best meet real-time applications of 2-D DWT with demanding requirements in terms of speed, throughput, and power consumption. Therefore, 2-parallel and 3-parallel form of the single pipelined intermediate architecture are proposed. The 2-parallel and 3-parallel pipelined intermediate architectures achieve speedup factors of 2 and 3, respectively, as compared with single pipelined intermediate architecture proposed by Ibrahim et al."^^ . "2009" . "36" . "2" . . "IAENG International Journal of Computer Science"^^ . . . "1819656X" . . . . . . . . . . "I."^^ . "Saeed Koko"^^ . "I. Saeed Koko"^^ . . "H."^^ . "Agustiawan"^^ . "H. Agustiawan"^^ . . . . . "HTML Summary of #732 \n\nParallel form of the pipelined intermediate architecture for two-dimensional discrete wavelet transform\n\n" . "text/html" . .