TY  - JOUR
AV  - none
N1  - cited By 12
TI  - Fundamental simulation studies of CONWIP in front-end wafer fabrication
SP  - 232
SN  - 21681015
PB  - Taylor and Francis Ltd.
EP  - 246
IS  - 4
N2  - Production planning and control in semiconductor manufacturing is complicated by high-level of re-entrant. Job batching is commonly used to reduce required setup time and maximize workstation utilization. New research promotes CONWIP in pull production systems, while limiting overall work-in-process. However, the implications of batching on CONWIP systems have not been well studied. This paper describes a series of simulation studies and adopted ANOVA and response surface methodology to investigate the effects and relationship of batching on different numbers of CONWIP cards, demand composition, re-entrant, and setup times. Simulation results show that all batching systems exhibited a high number of CONWIP cards and low job mix, total layers, and setup times when the lowest average flow time as well as the highest throughput level and workstation utilization are achieved. The overall result reveals that batching systems outperform non-batching systems in the simulation model of a CONWIP production control system in semiconductor manufacturing. © 2015 Chinese Institute of Industrial Engineers.
KW  - Production control; Semiconductor device manufacture
KW  -  Batching system; CONWIP; Process flows; simulation; Wafer fabrications
KW  -  Silicon wafers
ID  - scholars5938
Y1  - 2015///
UR  - https://www.scopus.com/inward/record.uri?eid=2-s2.0-84930592456&doi=10.1080%2f21681015.2015.1045562&partnerID=40&md5=b16182f183bff3f8d4d067faee24e4b0
A1  - Muhammad, N.A.
A1  - Chin, J.F.
A1  - Kamarrudin, S.
A1  - Chik, M.A.
A1  - Prakash, J.
JF  - Journal of Industrial and Production Engineering
VL  - 32
ER  -