eprintid: 513 rev_number: 2 eprint_status: archive userid: 1 dir: disk0/00/00/05/13 datestamp: 2023-11-09 15:16:09 lastmod: 2023-11-09 15:16:09 status_changed: 2023-11-09 15:14:44 type: article metadata_visibility: show creators_name: Hamid, N.H. creators_name: Murray, A.F. creators_name: Roy, S. title: Time-domain modeling of low-frequency noise in deep-submicrometer MOSFET ispublished: pub keywords: Circuit simulation; Computer simulation; Monte Carlo methods; SPICE; Time domain analysis; Transients, Low-frequency noise; Random telegraph signal noise; Semiconductor device modeling, MOSFET devices note: cited By 17 abstract: 1/f noise and random telegraph signal (RTS) noise are increasingly dominant sources of low-frequency noise as the MOSFET enters the nanoscale regime. In this study, 1 noise and RTS noise in the n-channel MOSFET are modelled in the time domain for efficient implementation in transient circuit simulation. A technique based on sum-of-sinusoids models 1/f noise while a Monte Carlo based technique is used to generate RTS noise. Lowfrequency noise generated using these models exhibits the correct form of noise characteristics as predicted by theory, with noise parameters from standard 0.35- μm and 35-nm CMOS technology. Implementation of the time-domain model in SPICE shows the utility of the noisy MOSFET model in simulating the effect of lowfrequency noise on the operation of deep-submicrometer analog integrated circuits. © 2008 IEEE. date: 2008 publisher: Institute of Electrical and Electronics Engineers Inc. official_url: https://www.scopus.com/inward/record.uri?eid=2-s2.0-42949160544&doi=10.1109%2fTCSI.2007.910543&partnerID=40&md5=f1a11c69b7a75114691873e828403461 id_number: 10.1109/TCSI.2007.910543 full_text_status: none publication: IEEE Transactions on Circuits and Systems I: Regular Papers volume: 55 number: 1 pagerange: 245-257 refereed: TRUE issn: 10577122 citation: Hamid, N.H. and Murray, A.F. and Roy, S. (2008) Time-domain modeling of low-frequency noise in deep-submicrometer MOSFET. IEEE Transactions on Circuits and Systems I: Regular Papers, 55 (1). pp. 245-257. ISSN 10577122