@inproceedings{scholars4952,
             doi = {10.1109/ICIAS.2014.6869490},
            year = {2014},
            note = {cited By 4; Conference of 2014 5th International Conference on Intelligent and Advanced Systems, ICIAS 2014 ; Conference Date: 3 June 2014 Through 5 June 2014; Conference Code:107042},
           title = {Design of CMOS based thermal energy generator for energy harvesting},
         address = {Kuala Lumpur},
       publisher = {IEEE Computer Society},
         journal = {2014 5th International Conference on Intelligent and Advanced Systems: Technological Convergence for Sustainable Future, ICIAS 2014 - Proceedings},
            isbn = {9781479946549},
          author = {Abdul Rahman, Z. H. and Khir, M. H. Md. and Burhanudin, Z. A. and Abdul Rahman, A. A. and Wan Jamil, W. A.},
        abstract = {This paper presents the design of complementary metal-oxide-semiconductor (CMOS) based thermal energy generator (TEG). Energy harvesting techniques have been employed as to extend the lifespan of various battery-operated applications for many years. Among numerous techniques available, thermal energy harvesting has proven to be a widespread practice in harvesting electrical energy as heat can be found in natural and also man-made environments. Electrical energy is harvested from heat by means of TEG using the Seebeck effect mechanism. The new concept of TEG consisting of p-type and n-type polysilicon is designed based on CMOS technology. Three distinctive features are introduced as to increase the temperature difference between the hot and cold junctions. The dielectric layer between Metal 1 and Metal 2 layer is designed to be thicker in order to achieved maximum temperature at hot junction. Trenches is included between hot and cold junctions to isolate cold junction from heating up due to heat from silicon substrate. Overcoat thermal insulator and heat sink layer is coated on top surface of TEG to maximize the temperature difference gained between the two junctions. Both theoretical and simulation analysis are implemented to verify the enhancement on the temperature difference obtained based on the abovementioned features. Based on simulation result, the efficiency of the TEG is estimated. For a device in the size of 5 mm2 with 5 K temperature difference across two sides, the output voltage and power is 3.294 V and 0.925 {\^I}1/4W, respectively. The voltage factor is 2.635 Vcm-2K-2 and power factor is 0.148 {\^I}1/4Wcm-2K-2. {\^A}{\copyright} 2014 IEEE.},
        keywords = {CMOS integrated circuits; Electric power factor; Energy harvesting; Seebeck effect; Thermal energy, Battery-operated applications; Complementary metal oxide semiconductors; Electrical energy; Maximum temperature; Silicon substrates; Simulation analysis; Temperature differences; Thermal insulators, Electric generators},
             url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84906337145&doi=10.1109\%2fICIAS.2014.6869490&partnerID=40&md5=0169deba9dd8bf7ce464258ab75944cb}
}