@inproceedings{scholars4932,
           title = {Noise and Bandwidth analysis for PMOS based wide swing cascode current mirror using 0.35 um CMOS-MEMS technology},
         address = {Kuala Lumpur},
         journal = {2014 5th International Conference on Intelligent and Advanced Systems: Technological Convergence for Sustainable Future, ICIAS 2014 - Proceedings},
       publisher = {IEEE Computer Society},
             doi = {10.1109/ICIAS.2014.6869546},
            year = {2014},
            note = {cited By 3; Conference of 2014 5th International Conference on Intelligent and Advanced Systems, ICIAS 2014 ; Conference Date: 3 June 2014 Through 5 June 2014; Conference Code:107042},
             url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-84906342285&doi=10.1109\%2fICIAS.2014.6869546&partnerID=40&md5=ba7b32a5329226806d136650fb40a967},
        keywords = {Bandwidth; Computer simulation; Electric power supplies to apparatus; Electric resistance; Integrated circuit manufacture; Transistors, Bandwidth analysis; Cadence; Circuit design tools; Current mirrors; Low voltage levels; noise; Output resistance; Wide-swing cascode, Mirrors},
        abstract = {In this work, we propose a PMOS based wide swing cascode current mirror (WSSCM) for 0.35 um CMOS-MEMS technology. The proposed circuit shows a high bandwidth current mirror with high output resistance capability operating at low voltage levels. Noise, output resistance and bandwidth analysis are presented. CADENCE SPECTRE circuit design tool using MIMOS 0.35 um and BSIM3 transistor models is used to carry out the simulations. The circuit achieves an amplification of 120.04 uA, the input referred noise of the circuit is 75.77 nV/{\^a}??Hz with a minimum power consumption of 0.33 mW and a high output resistance of 15 MO. {\^A}{\copyright} 2014 IEEE.},
          author = {Mian, M. U. and Dennis, J. O. and Khir, M. H. Md. and Tang, T. B. and Sutri, N. Y.},
            isbn = {9781479946549}
}