eprintid: 378
rev_number: 2
eprint_status: archive
userid: 1
dir: disk0/00/00/03/78
datestamp: 2023-11-09 15:16:00
lastmod: 2023-11-09 15:16:00
status_changed: 2023-11-09 15:14:26
type: conference_item
metadata_visibility: show
creators_name: Nawi, I.M.
creators_name: Kordesch, A.V.
title: Design of a 10 GHz ring oscillator for PDK verification
ispublished: pub
keywords: Back-end design; Design tool; Front end; Gate delays; Oscillator circuits; Process design kit; Ring oscillator; Test chips, Oscillators (electronic); Process engineering, Design
note: cited By 1; Conference of 2008 IEEE International Conference on Semiconductor Electronics, ICSE 2008 ; Conference Date: 25 November 2008 Through 27 November 2008; Conference Code:76092
abstract: In this work we developed a set of a 10 GHz Ring Oscillators for the purpose of verifying the accuracy of a CMOS foundry's design tools. The project involves front end to back end design, to tapeout. After fabrication of the chip was completed, measurements were performed to test the accuracy of the oscillators. This test chip was used to verify Silterra's PDK (Process Design Kit). Four different oscillator circuits were fabricated. The results show excellent agreement between simulated and measured gate delay. ©2008 IEEE.
date: 2008
official_url: https://www.scopus.com/inward/record.uri?eid=2-s2.0-65949124681&doi=10.1109%2fSMELEC.2008.4770290&partnerID=40&md5=679064dab7fd3e1b73a9408211b8436e
id_number: 10.1109/SMELEC.2008.4770290
full_text_status: none
publication: IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE
place_of_pub: Johor Bahru, Johor
pagerange: 122-125
refereed: TRUE
isbn: 9781424425617
citation:   Nawi, I.M. and Kordesch, A.V.  (2008) Design of a 10 GHz ring oscillator for PDK verification.  In: UNSPECIFIED.