<> "The repository administrator has not yet configured an RDF license."^^ . <> . . . "Two-stage interface circuit design for a 32-color resolution optical sensor"^^ . "An interface circuit design for an optical sensor based on a two-stage cascaded architecture is presented in this paper. The proposed design is a mixed signal solution that provides few advantages in terms of speed, power consumption, higher resolution with smaller number of storage units, and small area for future on-chip integration. Simulation and experimental results for five bits resolution (32 levels) are presented to validate the design. We are aiming for a single-chip integrated solution; however, for a quick proof of concept, the proposed design has been implemented as a PCB using discrete off-the-shelf components. The biasing current and power consumption from the PCB implementation are 192 mA and 1.3 W, respectively, at a 6.75-V supply voltage. © 2001-2012 IEEE."^^ . "2013" . . "13" . "2" . . "IEEE Sensors Journal"^^ . . . "1530437X" . . . . . . . . . . . . . "I."^^ . "Yohannes"^^ . "I. Yohannes"^^ . . "M."^^ . "Assaad"^^ . "M. Assaad"^^ . . "A."^^ . "Bermak"^^ . "A. Bermak"^^ . . . . . "HTML Summary of #3765 \n\nTwo-stage interface circuit design for a 32-color resolution optical sensor\n\n" . "text/html" . .