TY - JOUR VL - 100 JF - International Journal of Electronics A1 - Alser, M.H. A1 - Assaad, M.M. A1 - Hussin, F.A. N1 - cited By 0 UR - https://www.scopus.com/inward/record.uri?eid=2-s2.0-84886065383&doi=10.1080%2f00207217.2012.751322&partnerID=40&md5=ca30eb97352373ac3043caf0df9bf89b Y1 - 2013/// SP - 1546 AV - none ID - scholars3377 EP - 1556 N2 - In this article, an FPGA-based design and implementation of a fully digital wide-range programmable frequency synthesizer based on a finite state machine filter is presented. The advantages of the proposed architecture are that, it simultaneously generates a high frequency signal from a low frequency reference signal (i.e. synthesising), and synchronising the two signals (signals have the same phase, or a constant difference) without jitter accumulation issue. The architecture is portable and can be easily implemented for various platforms, such as FPGAs and integrated circuits. The frequency synthesizer circuit can be used as a part of SERDES devices in intra/inter chip communication in system-on-chip (SoC). The proposed circuit is designed using Verilog language and synthesized for the Altera DE2-70 development board, with the Cyclone II (EP2C35F672C6) device on board. Simulation and experimental results are included; they prove the synthesizing and tracking features of the proposed architecture. The generated clock signal frequency of a range from 19.8 MHz to 440 MHz is synchronized to the input reference clock with a frequency step of 0.12 MHz. © 2013 Taylor & Francis. SN - 00207217 KW - All digital phase locked loop; Delay-locked loops; Design and implementations; Frequency reference; High frequency signals; Jitter accumulation; Proposed architectures; System-On-Chip KW - Application specific integrated circuits; Clocks; Computer hardware description languages; Frequency synthesizers; Microprocessor chips; Programmable logic controllers; Signal processing; Synchronization KW - Field programmable gate arrays (FPGA) IS - 11 TI - A wide-range programmable frequency synthesizer based on a finite state machine filter ER -