TY  - CONF
TI  - Performance profile of some hybrid heuristic search techniques using compiler flag selection as a seed example
ID  - scholars2873
KW  - Code optimization; Comparative studies; compiler flag; Compiler technology; Computer codes; generation; Hybrid algorithms; Hybrid heuristics; Performance profile; population; Post-implementation; Processor architectures; Specific nature
KW  -  Computer architecture; Computer programming; Heuristic algorithms; Optimization; Simulated annealing
KW  -  Program compilers
N1  - cited By 0; Conference of 2012 IEEE Congress on Evolutionary Computation, CEC 2012 ; Conference Date: 10 June 2012 Through 15 June 2012; Conference Code:92853
N2  - The availability of different flavor of processor architecture coupled with computer codes of various nature poses a discreet challenge to the programmers in forms of code optimization. Programmers need to contemplate on optimization during pre and post implementation to take advantage of the hardware given for a specific nature of the code. To compliment this requirement, the evolution of compiler technology has resulted in built in optimization functionality called compiler flags. Like a switch the flag turns on or off for a particular optimization behavior. The existence of various flags in turn causes confusion as to which flag or combination of flags to be utilized since misuse has detrimental effect on performance. In this work we are performing a comparative study on the utilization of Genetic Algorithm and Simulated Annealing in finding the best compiler flag combination respectively and finally proposing a hybrid algorithm that produces better flag combination in comparison to the former two. © 2012 IEEE.
AV  - none
CY  - Brisbane, QLD
A1  - Sandran, T.
A1  - Zakaria, N.
A1  - Pal, A.J.
UR  - https://www.scopus.com/inward/record.uri?eid=2-s2.0-84866879511&doi=10.1109%2fCEC.2012.6256576&partnerID=40&md5=4dba398dce6cb28277fb007e7d8b182f
SN  - 9781467315098
Y1  - 2012///
ER  -