?url_ver=Z39.88-2004&rft_id=10.1109%2FICIAS.2012.6306128&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.au=Alser%2C+M.H.&rft.aulast=Alser&rft.aufirst=M.H.&rft.isbn=9781457719677&rft.title=Design+and+FPGA+implementation+of+PLL-based+quarter-rate+clock+and+data+recovery+circuit&rft.date=2012&rft.genre=proceeding