%0 Journal Article
%@ 19430663
%A Lu, C.-K.
%A Liew, W.S.
%A Tang, T.B.
%A Lin, C.-H.
%D 2024
%F scholars:19887
%I Institute of Electrical and Electronics Engineers Inc.
%J IEEE Embedded Systems Letters
%K Application programs; Computer aided diagnosis; Computer hardware; Convolution; Electric power utilization; Field programmable gate arrays (FPGA); Network layers; Neural networks, Cancer; Colorectal cancer; Convolutional neural network; Embedded device; Field programmable gate array; Field programmables; Hardware; Polyp detection; Power demands; Programmable gate array, Diseases
%N 1
%P 5-8
%R 10.1109/LES.2023.3234973
%T Implementation of a Convolutional Neural Network Into an Embedded Device for Polyps Detection
%U https://khub.utp.edu.my/scholars/19887/
%V 16
%X The increasing rates of colorectal cancer and associated mortality have attracted interest in the use of computer-aided diagnosis tools based on artificial intelligence (AI) for the detection of polyps at an early stage. Most AI models are implemented on software platforms; however, due to the demands of embedded devices, hardware implementations have to fulfill the demands of real-time applications with better accuracy and low-power consumption. In this letter, we propose an optimized four-layer network that can be implanted into an embedded device and determine the feasibility of implanting our convolutional neural network (CNN) into a microprocessor. The essential functions of the CNN (i.e., padding, convolution, ReLU, max-pooling, fully connected, and softmax layers) are implemented in the microprocessor. The proposed method achieves efficient classification with high performance and takes only 2.5488 mW at a working frequency of 8 MHz. We conclude this letter with a discussion of the results and future direction of research. © 2009-2012 IEEE.
%Z cited By 0