TY  - JOUR
EP  - 798
ID  - scholars1981
KW  - Buck converters; Converter design; Efficient power; Experimental analysis; Gate drives; High efficiency; Low loss; Low ripple; Output load; Rapid advancement; Switching loss; Synchronous rectifier
KW  -  DC-DC converters; Electric power transmission; Switching; Voltage regulators
KW  -  Electric rectifiers
IS  - 7
TI  - Experimental analysis of a new zero-voltage switching synchronous rectifier buck converter
SN  - 17554535
N2  - High-efficiency converters with excellent low ripple regulated output load must feature the outstanding switching loss reduction mechanism. The rapid advancement of low-loss converter design has posed stringent challenges to designers for efficient power delivery and tight voltage regulation. In this work, the new synchronous rectifier buck converter (SRBC) circuit is proposed. It has been found that the SRBC can operate effectively at 1 MHz switching frequency with low switching and gate drive losses operating in zero-voltage switching condition. © 2011 The Institution of Engineering and Technology.
AV  - none
SP  - 793
N1  - cited By 13
UR  - https://www.scopus.com/inward/record.uri?eid=2-s2.0-79960921126&doi=10.1049%2fiet-pel.2010.0218&partnerID=40&md5=c3e4ba3f578f4bb8901a828f80a5cf30
A1  - Yahaya, N.Z.
A1  - Begam, K.M.
A1  - Awan, M.
Y1  - 2011///
VL  - 4
JF  - IET Power Electronics
ER  -