relation: https://khub.utp.edu.my/scholars/17374/
title: An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection
creator: Nguyen, N.-D.
creator: Bui, D.-H.
creator: Hussin, F.A.
creator: Tran, X.-T.
description: This article presents an adaptive hardware architecture for high-performance object detection using Histogram of Oriented Gradient (HOG) features in combination with Supported Vector Machines (SVM). This architecture can adapt to various bit-width representations of HOG features by using the quantization technique. The HOG features can be represented from 8 bits to 4 bits to remove the bubble in the processing pipeline and reduce the memory footprint. As a result, the overall throughput is robustly increased as the number of bits decreases. Moreover, we propose a new cell-reused strategy to speed up the system throughput and reduce memory footprint. The proposed architecture has been implemented in TSMC 65nm technology with a maximum operating frequency of 500MHz and throughput of 3.98Gbps. The total hardware area cost is about 167KGEs and 212kb SRAMs. © 2022 IEEE.
publisher: Institute of Electrical and Electronics Engineers Inc.
date: 2022
type: Conference or Workshop Item
type: PeerReviewed
identifier:   Nguyen, N.-D. and Bui, D.-H. and Hussin, F.A. and Tran, X.-T.  (2022) An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection.  In: UNSPECIFIED.     
relation: https://www.scopus.com/inward/record.uri?eid=2-s2.0-85142756779&doi=10.1109%2fICICDT56182.2022.9933068&partnerID=40&md5=8dbc6c28f9905b2df68cc139546542d7
relation: 10.1109/ICICDT56182.2022.9933068
identifier: 10.1109/ICICDT56182.2022.9933068