eprintid: 17274
rev_number: 2
eprint_status: archive
userid: 1
dir: disk0/00/01/72/74
datestamp: 2023-12-19 03:23:41
lastmod: 2023-12-19 03:23:41
status_changed: 2023-12-19 03:07:46
type: conference_item
metadata_visibility: show
creators_name: Al-Shatari, M.
creators_name: Hussin, F.A.
creators_name: Aziz, A.A.
creators_name: Rohmad, M.S.
creators_name: Tran, X.-T.
title: Composite Lightweight Authenticated Encryption Based on LED Block Cipher and PHOTON Hash Function for IoT Devices
ispublished: pub
keywords: Architecture; Authentication; C (programming language); Computer circuits; Economic and social effects; Field programmable gate arrays (FPGA); Internet of things; Light emitting diodes; Logic gates; Photons, Authenticated encryption; Block ciphers; Cryptographic primitives; Internal function; LED block cipher; Logic-elements; Message authentication codes; Performance tradeoff; PHOTON hash function; Security level, Hash functions
note: cited By 1; Conference of 15th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022 ; Conference Date: 19 December 2022 Through 22 December 2022; Conference Code:186065
abstract: IoT devices are being used in different environments recently. They are mostly resource-constrained, and therefore, their data security is crucial. Several lightweight cryptographic primitives were proposed to overcome the limitations of the devices while maintaining moderate security levels. Such primitives provide either encryption or authentication. The encryption must be authenticated by a Message Authentication Code (MA C) or hash function for better overall security. Therefore, an architecture of integrated lightweight authenticated encryption (AE) based on LED block cipher and PHOTON hash function is presented. LED and PHOTON architectures were combined while exploiting area-performance trade-offs and utilizing the shared internal functions. The architecture is designed in Verilog HDL, synthesized in Altera Quartus II and simulated on Field Programmable Gate Array (FPGA) devices. The individual design of LED utilizes 357 logic elements (LE) and PHOTON utilizes 852 LE resulting in a total of 1209 LE. The logic utilization of the proposed shared architecture is 1046 LE. The results reveal that 13.5  reduction in logic area is achieved compared to the independent implementations of LED and PHOTON. © 2022 IEEE.
date: 2022
publisher: Institute of Electrical and Electronics Engineers Inc.
official_url: https://www.scopus.com/inward/record.uri?eid=2-s2.0-85147435261&doi=10.1109%2fMCSoC57363.2022.00030&partnerID=40&md5=47ab5f97bf09a268333823fae71ea14b
id_number: 10.1109/MCSoC57363.2022.00030
full_text_status: none
publication: Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
pagerange: 134-139
refereed: TRUE
isbn: 9781665464994
citation:   Al-Shatari, M. and Hussin, F.A. and Aziz, A.A. and Rohmad, M.S. and Tran, X.-T.  (2022) Composite Lightweight Authenticated Encryption Based on LED Block Cipher and PHOTON Hash Function for IoT Devices.  In: UNSPECIFIED.