eprintid: 1209
rev_number: 2
eprint_status: archive
userid: 1
dir: disk0/00/00/12/09
datestamp: 2023-11-09 15:49:22
lastmod: 2023-11-09 15:49:22
status_changed: 2023-11-09 15:39:13
type: conference_item
metadata_visibility: show
creators_name: Osman, Z.E.M.
creators_name: Hussin, F.A.
creators_name: Ali, N.B.Z.
title: Optimization of processor architecture for image edge detection filter
ispublished: pub
keywords: Computation time; Data reuse; Edge detection filters; Embedded video processing; Hardware implementations; Image edge detection; Image pixels; Memory access; Optimized architectures; Processor architectures; Proposed architectures; Sobel edge detection, Computer simulation; Edge detection; Hardware; Nanotechnology; Optimization; Pixels, Computer architecture
note: cited By 12; Conference of 12th UKSim International Conference on Modelling and Simulation, UKSim 2010 ; Conference Date: 24 March 2010 Through 26 March 2010; Conference Code:80938
abstract: In this paper, a dedicated edge detection processor architecture based on field programmable gate arrays is presented. The architecture is an optimization of the Sobel edge detection filter, specifically focusing on the reduction of the computation time. The proposed architecture reduces the number of calculations required for the edge detection process by enhancing the data reuse, i.e. minimizing the frequency of memory access. Direct hardware implementation as proposed by previous works require most image pixels to be read from memory up to six times and transferred into the Sobel edge detection processor. In our work, we try to reduce the number of pixels read therefore affecting tremendous potential speed suitable for the embedded video processing applications. © 2010 IEEE.
date: 2010
official_url: https://www.scopus.com/inward/record.uri?eid=2-s2.0-77954488285&doi=10.1109%2fUKSIM.2010.123&partnerID=40&md5=aac57d3da22b4cb5a2d2347aa1e7ed59
id_number: 10.1109/UKSIM.2010.123
full_text_status: none
publication: UKSim2010 - UKSim 12th International Conference on Computer Modelling and Simulation
place_of_pub: Cambridge
pagerange: 648-652
refereed: TRUE
isbn: 9780769540160
citation:   Osman, Z.E.M. and Hussin, F.A. and Ali, N.B.Z.  (2010) Optimization of processor architecture for image edge detection filter.  In: UNSPECIFIED.