Dimensions
DimensionsLeong, Y. and Lo, H. and Drieberg, M. and Sayuti, A.B. and Sebastian, P. (2017) Performance comparison review of 8-3 compressor on FPGA. In: UNSPECIFIED.
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Official URL: https://www.scopus.com/inward/record.uri?eid=2-s2....
Abstract
Compressors are commonly utilized in multipliers for reducing partial products in a parallel manner. In this paper 7-3, 7-4, 8-3, 8-4, 9-3, and 9-4 compressors designed with adder circuits or multiplexer circuits were implemented in Altera EP2C70F896 FPGA and their performance compared in terms of number of logic gates used, cell area and power delay product (PDP) for an optimum recommendation for the implementation of 8-3 compressor design in FPGA. © 2017 IEEE.
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Additional Information: | cited By 2; Conference of 2017 IEEE Region 10 Conference, TENCON 2017 ; Conference Date: 5 November 2017 Through 8 November 2017; Conference Code:133992 |
| Uncontrolled Keywords: | Adders; Delay circuits; Field programmable gate arrays (FPGA); Multiplexing equipment; Product design, Adder circuit; Compressor designs; Multiplexer; Partial product; Performance comparison; Power delay product, Compressors |
| Depositing User: | Mr Ahmad Suhairi UTP |
| Date Deposited: | 09 Nov 2023 16:19 |
| Last Modified: | 09 Nov 2023 16:19 |
| URI: | https://khub.utp.edu.my/scholars/id/eprint/8051 |
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