Probabilistic computing provides a new approach towards building fault-tolerant systems. In a fully digital system, the logic states are considered as random variables. One can no longer expect a correct logic signal at all nodes at all times, but only that the joint probability distribution of signal values has the highest likelihood for valid logic states. A case study on probabilistic architecture implementation based on Markov Random Field (MRF) is discussed. A comparison between MRF-based and standard CMOS-based inverters simulation results in micro-scale for both noisy and ideal conditions was performed using Cadence tools. The results show that MRF inverter is tolerant to noise as compared to the standard inverter. ©2008 IEEE.