Design of a 10 GHz ring oscillator for PDK verification

Nawi, I.M. and Kordesch, A.V. (2008) Design of a 10 GHz ring oscillator for PDK verification. In: UNSPECIFIED.

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Abstract

In this work we developed a set of a 10 GHz Ring Oscillators for the purpose of verifying the accuracy of a CMOS foundry's design tools. The project involves front end to back end design, to tapeout. After fabrication of the chip was completed, measurements were performed to test the accuracy of the oscillators. This test chip was used to verify Silterra's PDK (Process Design Kit). Four different oscillator circuits were fabricated. The results show excellent agreement between simulated and measured gate delay. ©2008 IEEE.

Item Type: Conference or Workshop Item (UNSPECIFIED)
Additional Information: cited By 1; Conference of 2008 IEEE International Conference on Semiconductor Electronics, ICSE 2008 ; Conference Date: 25 November 2008 Through 27 November 2008; Conference Code:76092
Uncontrolled Keywords: Back-end design; Design tool; Front end; Gate delays; Oscillator circuits; Process design kit; Ring oscillator; Test chips, Oscillators (electronic); Process engineering, Design
Depositing User: Mr Ahmad Suhairi UTP
Date Deposited: 09 Nov 2023 15:16
Last Modified: 09 Nov 2023 15:16
URI: https://khub.utp.edu.my/scholars/id/eprint/378

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