Attributed to the rapidly maturing and evolving application of electronics packaging, efficient packaging processes are crucial in ensuring high quality and reliability of products. One of the elements in efficient packaging processes is the minimization of capacity losses. Most of the devices are patterned onto wafers, specifically for the front of line integrated circuit (IC) packaging. In this area, various capacity loss factors need to be correctly identified and integrated into production planning to prevent low fill rate, expansion of lead time and work-in process (WIP) build-up. This research is based on a case study; wherein potential capacity loss factors of a chosen front-of-line production are investigated to identify their impact on production performance. Mathematical models of various factors are integrated into the simulation model of the current production. The performance measure data are then collected and analysed, thus determining the significant capacity loss factors. It was found that cycle time, setup time, yield loss and machine downtime are significant capacity loss factors in front section of line packaging. © IEOM Society International.