Computation and analysis of output error probability for C17 benchmark circuit using bayesian networks error modeling Conference Paper

http://dx.doi.org/10.1109/scored.2010.5704037

authors

Khalid, Usman
Anwer, Jahanzeb
Singh, Narinderjit
Hamid, Nor Hisham bin
Asirvadam, Vijanth Sagayan A/L

publication date

2010

Digital Object Identifier (DOI)

https://doi.org/10.1109/scored.2010.5704037